a) Field of the Invention
The present invention relates to a semiconductor device and Its manufacturing method, and more particularly to a semiconductor device having a planarized wiring layer and its manufacturing method.
b) Description of the Related Art
Planarizing technique is important for highly integrated semiconductor devices to maintain a good step coverage and a high precision of photolithography. Contact holes or via holes are formed in an insulating film overlying a semiconductor substrate or a wiring, and thereafter a wiring layer is formed on the insulating film to make electrical contacts with the underlying conductive regions through the contact holes or via holes. If contact holes or via holes can be fully filled with conductive material, a wiring layer formed thereon can be planarized. Known as a contact hole (via hole) burying technique are a selective growth technique of refractory metal and a combined technique of chemical vapor deposition (CVD, blanket deposition) and etch-back of a refractory metal layer.
This latter technique typically forms a tungsten (W) layer conformal to the topography of an underlying layer by CVD through reduction of WF.sub.6 by silane and hydrogen. The W layer by CVD is grown also on the side wall of a contact hole. If the W layer is grown thicker than the radius of a contact hole, the contact hole is buried by the W layer growing From the side wall. The W layer grown on a flat surface outside of the contact hole is removed by etch-back technique. In this manner, the W layer can be left only in the contact hole.
The size of each contact hole for the source/drain regions of a MOS transistor formed on a semiconductor substrate is small because of a limited area of the source/drain regions, whereas the size of a contact hole for use in stabilizing the potential of a wall is made sufficiently large so as to make a voltage drop negligible even if a large current is flowed. Contact holes having different diameters are therefore formed in an insulating layer. In this case, it takes a long time to bury a large contact hole by tungsten CVD. An unnecessarily thick W layer is therefore deposited on a flat surface and at a small contact hole. This burying technique is therefore impractical. Although the planarizing technique combining blanket growth and etch-back of W is particularly suitable for burying deep contact holes of uniform and small diameters, it is difficult to bury a plurality of contact holes having different diameters.
A W layer directly deposited on an insulating film such as silicon oxide has poor adhesion or contact with the insulating film. An adhesion layer made of a Ti/TiN laminate is generally deposited first on an insulating film with contact holes, and then a W layer is deposited on the adhesion layer. This adhesion layer also has a function of preventing mutual diffusion of Si in the substrate and W in the W layer. The adhesion layer has generally a thickness of 10 nm or more. A Ti single layer having a thickness of 20 nm or more may be used instead of a laminate. In etch-back, W is etched and the adhesion layer is left unetched.